Description
:
Specific responsibilities will include:
1. Design and implementation of Tensilica software tool chain, in particular the instruction set simulator (ISS) for RISC-V processors
2. Development of software models for RISC-V processor features for functional, cycle-accurate, and HW/SW simulation.
3. Enhancements and maintenance of the existing RISC-V simulator
4. Verification of software models in hardware-software co-simulation environment
5. Integration of the RISC-V instruction set simulator with 3rd party system modeling environments
Requirements
6. MS or PhD in Computer Science or Electrical/Computer Engineering
7. Bachelors in computer science or electrical Engineering + 7 years of related experience, or Masters + 5 years of related experience. Outstanding candidates with PhD and no industrial work experience will be considered.
8. Strong C/C++ development skills
9. Knowledge of ISA, CPU micro architecture, and assembly
10. Knowledge of SystemC and TLM methodologies
11. Experience with GNU development tools and/or Microsoft Visual Studio environment
12. Experience with modeling tools for performance analysis or Hardware/Software Co-simulation
13. Experience in Electronic design automation (EDA) flow
14. Experience developing software on Linux environment
15. Ability of reading specification and standard documents, and retrieving needed knowledge from various resources
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