This global proprietary trading firm is a leader in quantitative and systematic investing, leveraging cutting-edge technology to optimise trading performance.
Operating in a fast-paced, data-driven environment, the firm continuously innovates to maintain its competitive edge in high-frequency trading.
As an FPGA Engineer, you will be responsible for designing and developing ultra-low-latency hardware solutions that enhance trading execution.
You will work closely with traders, quants, and software engineers to translate trading strategies into high-performance FPGA implementations.
Your role will involve developing RTL for the latest FPGA platforms, optimising performance, and ensuring seamless deployment into production.
You will be expected to take ownership of your designs, analyse results, and continuously refine them for maximum efficiency in a real-time trading environment.
The ideal candidate will have at least ten years of FPGA development experience with a deep understanding of FPGA architecture and design flows.
A strong background in full lifecycle RTL development, including automated verification, is essential, along with proficiency in Python scripting and working knowledge of C++.
The ability to design and optimise high-performance, low-latency hardware solutions is crucial, as is the capability to navigate complex technical challenges and distil them into effective, scalable designs.
Experience leading projects or mentoring teams will be considered an advantage.
This is a high-impact role in a fast-moving environment where your contributions will directly influence trading performance.
If you are passionate about FPGA development and high-performance computing, this is a rare opportunity to join a world-class trading technology team and work at the forefront of hardware acceleration in quantitative trading.
Apply now to be part of an innovative and dynamic team.
This role is based in Sydney and does not offer sponsorship.
Seniority levelMid-Senior levelEmployment typeFull-timeJob functionResearch, Finance, and Engineering #J-18808-Ljbffr